Electrode Edge Impedance Design For Rf Bias Cathodes In Plasma Reactors

Plasma reactors for semiconductor manufacturing require control of plasma parameters that must extend over surface areas exceeding 700cm 2 . This control needs to be carried out to the edges of the cathodes that hold the semiconductor wafer and provide uniform processing to within a few millimeters of the wafer edge. Discontinuities in geometry and material properties can result in non-uniformities that adversely impact performance at this wafer edge. This is typically addressed by engineering the cathode edge with complex material stacks that are intended to provide uniform plasma conditions at or beyond the wafer edge. Variability in plasma conditions such as plasma density and sheath voltage present design challenges for engineering these material stacks in such a way that they can operate over a large process window. Material erosion over time further complicates the need to extend uniform process conditions with these material stacks.