Capacitive Memory Using GLAD Synthesized Annealed SnO2 Nanowires Array as a Dielectric

This paper presents the fabrication of as-deposited and annealed SnO
2
NWs via GLAD (glancing angle deposition) technique. On investigation, the 650 °C SnO
2
NWs show improvement in its crystallinity. The capacitive behavior of both the device was analyzed by evaluating the capacitance-voltage (CV) and conductance-voltage (G-V) characteristics for both asdeposited and annealed sample by varying frequencies. The annealed device showed improved capacitive memory with interface trap density (9.7×10
⁹
eV
^-1
cm
^-2
), charge storage density of 5.45×10
¹⁰
cm
^-2
and memory window of ~ 0.89 V at ± 8V for 1MHz.