I. Introduction
The number of variable-speed drives (VSD) has increased significantly in recent years and will increase much more in the next decade. This increase is driven by two effects: First, higher efficiency standards, which also include partial loads, lead to a conversion of existing infrastructure towards VSD, e.g. for pumps, fans, etc. [1], [2]. Second, due to the new CO2 standards for passenger cars of the European Union (EU) [3] and the improvement of electric vehicles (EV), the new registrations of EVs in EU was raised from 56000 cars in 2015 to 341000 cars in 2020 and is still increasing fast [4]. Driven by this trend, however, the requirements in the development of such drives are also increasing with regard to functionality, reliability and safety as well as the development costs and thus the development time. In order to meet these increasing requirements, both the development process and the development tools for VSD must be further improved in the same manner. As a result of this development, four main test or simulation levels can be distinguished today: Software-in-the-Loop (SIL), Hardware-in-the-Loop (HIL), Power Hardware-in-the-LOOD (PHIL) and conventional motor test benches [5].
Signal processing system mainboard