I. Introduction
In the last 60 years, semiconductor industry growth has been driven by transistor miniaturization and introduction of performance boosters such as metal gates, high-k dielectrics, and strain. The current state-of-the-art transistor technology is fin field-effect transistor (FinFET) with a nanoscale active region. Fabrication and device optimization at such scale are expensive and complex due to strong quantum mechanical effects which a strong impact on device performance. At ultra-short gate lengths, i.e. under ~20 nm, enabling short channel effects (SCEs) suppression is difficult and, hence, new materials and structures are sought to enable further device scaling and to improve device performance [1].