I. Introduction
This work is dedicated to the problem of reproducibility of upsets in digital CMOS chips when exposed to pulsed laser radiation. Traditionally, it is considered that transient radiation upsets occur in the chip when the energy of the irradiation pulse exceeds a certain threshold, called the failure level. It is known that the failure level depends on experimental conditions: the duration of the irradiation pulse and its shape, the supply voltage of the chip, its clock frequency and functional mode, as well as the method of testing [1] –[10]. Thus, it is assumed that several parameters determine the failure level, which is the only characteristic of the fault tolerance of the chip: if the threshold energy is exceeded, the transient upset should be observed. However, the practice of research of complex modern CMOS ICs shows that this simple picture is not observed in all cases.