Comparative Analysis of Various Methods to Circuit Design for DWT with CDF 9/7 Wavelet

Discrete wavelet transform (DWT) is widely used to solve one-dimensional and multidimensional signal processing problems. The high growth rates of quantitative and qualitative characteristics of digital information lead to the need to improve data processing methods and increase the efficiency of their implementation. Specialized hardware circuits are used to solve this problem since they can significantly enhance the characteristics of DWT implementation devices. Various methods are used to implement DWP. They differ in the priority of resource consumption. This paper proposes a comparative analysis of different state-of-the-art methods to circuit design for DWT with Cohen-Daubechies-Feauveau 9/7 wavelet using the “unit-gate” model. The evaluation results showed that optimized direct implementation (ODI) outperforms direct implementation in device delay by 38%-59%, losing in device area by only 7%-10%. ODI exceeds the lifting scheme in delay by 3.41-3.65 times, losing in area by 1.66-1.84 times.