Linearity and Analog Performance Analysis of Double Gate Tunnel FET With Source Pocket

This paper features the study of Linearity and analog/RF response of Double gate tunnel field-effect transistor with source pocket (SP-DG-TFET). A pocket of different lengths is inserted at the source-channel interface within the channel region. The variation of these pocket length affects device parameters. The investigated analog performance parameter includes energy band diagram (on/off state), electric field variation, g
m
(Transconductance), device capacitances (gate to drain (C
gd
and C
gs
)), cut-off frequency (f
t
), and for linearity figure of merits like
$g_{m2},\ g_{m3},\ VIP_{2},\ VIP_{3}$
, IIP
3
, IMD
3
. This comprehensive study investigates the impact of length deviation of pocket increases on Linearity, and analog/RF parameters. The investigation shows that the concept of pocket insertion within the channel (source side) helps enhance the overall performance of SP-DG-TFET, which can be used for low power applications.