Digital Phase-Frequency Detector in All-Digital PLL-based Local Oscillator for Radio Frequency Identification System Transceiver

An all-digital phase locked loop (A-DPLL)-based frequency synthesizer of the local oscillator (LO) for the radio frequency (RF) transceiver application such as in radio frequency identification (RFID) system has gained popularity among academia due to the transition of circuit technology from analog to digital implementation by accessing the benefits in complementary metal-oxide semiconductor (CMOS) process technology. The phase-frequency detector (PFD) is one of the main blocks in ADPLL and it is capable to detect the presence of phase and frequency errors by recognizing two input signals in digital form. The full-ranged of a time-to-digital converter (TDC) is commonly used in PFD block, but the power consumption is high. In this work, the less-TDC will be designed in the digital PFD block as an early development stage design for the ultra-low power ADPLL in order to improve fast phase-frequency acquisition and reduce power consumption. The digital PFD is designed by using Matlab Simulink and Verilog Hardware Description Language (HDL) code. The simulation result obtained that the time difference of the input signals for the Verilog is smaller than the result in Matlab Simulink without a unit delay. Thus, the design of the digital PFD will lead the desired ADPLL to achieve ultra-low power and fast locking range for RFID application.

I. Introduction

In recent years, the radio frequency identification (RFID) system have been developed and extensively employed in healthcare and biomedical area [1]–[3]. Due to its advantages, as real-time identification for a number of objects, the RFID technology has widely replaced the use of conventional bar-code identification [4]. The system’s goal is to transfer identification data or information between the tag and the responder through the RF transceiver to conduct certain applications based on the data reserved in the tag [5]. The RFID system is presently being developed to support a low-power device with improved data communication capabilities. For instance, T. Norliza et. al. proposed an energy harvesting (EH) circuit that uses hybrid input sources of energy to address the limitation of semi-active RFID tag lifespan issue owing to the battery demanded to power the circuitries in [5], [6] and J. Sampe et. al. in [7] introduced a new algorithm of fast detection for the RFID tag system. Christian et. al. in [8] established the transceiver front-end chip for the passive RFID tag in industrial, scientific and medical (ISM) band while sustaining the low power consumption performance as a consequence of the advancement of the complementary metal-oxide semiconductor (CMOS) technology. While N. H. M. Yunus et. al. in [9]–[11] developed MEMs based patched antenna for radio frequency application on ISM band. M. A. S. Bhuiyan et. al. in [12] developed on-chip transmit/receive (Tx/Rx) switch for RFID tag transceiver as shown as Fig. 1.