An ESD Investigation of 100 V UHV nLDMOSs Embedded with Schottky/SCR in the Drain Side

In this paper, the original 100 V nLDMOS device is modulated by embedded Schottky/SCR devices in the drain side via a TSMC 0.5 μm UHV process. This work is divided into three main items. At first, the N
⁺
in the drain terminal was divided into three equal partitions. The center ring N
⁺
is replaced by the P
⁺
doping, and then all N
⁺
zones were changed to P
⁺
. This approach will increase the ESD capability without changing the cell area, but it will result in a reduction in the V
h
value of the device, which will result in circuit latch-up effect. Secondly, by removing the N
⁺
region in the drain side and forming a Schottky interface at the outer circumference of the drain side, the on-resistance of parasitic BJT is increased and the low V
h
problem can be improved. Finally, the outer ring is doped with Schottky interface, the middle ring is doped with P
⁺
, and the inner ring is still doped with N
⁺
, which not only increases the ESD capability but also reduces the probability of latch-up effect. Eventually, these designed components were measured by TLP and HBM machines. It is found that when all the drain terminals are replaced by P
⁺
(s100_FP), its I
t2
value can exceed 9 A, which is the best for all components, but at the same time the V
h
value also decreases significantly. On the other hand, it is also found that both the s100_FP and s100_MPN samples can pass 8 kV HBM. Meanwhile, both the s100_FP and s100_MPN samples have excellent FOM values.