FPGA based Silicon on Chip using Flexible Digital Pre-Distortion for Software Defined Radio Transceiver

Reconfigurable FPGA based silicon on chip is designed using flexible digital pre-distortion for software defined radio transceiver in this proposed system. In the Silicon on Chip (SoC) platform the Flexible Digital Pre-distortion (FDP) is implemented along with the generation of real time baseband signal. The model named recollection multinomial constructed FDP explanation is realized for linearization of Radio Frequency (RF) Power Amplifiers (PA) here which makes system more cost effective and dynamic. On basis of the gain and phase coefficients of the Look Up Tables (LUT) the power amplifier behavior is identified. The non-linear coefficients are extracted using memory polynomial model. Therefore the non-delayed normalized mean square error can be achieved through the calculation of system performance and the LUT coefficients are updated. Finally the pre-distorted signal is generated for software defined radio transceiver.