Additive High-Speed Synchronization Techniques in PLL Systems

An overview of the methods of high-speed synchronization of devices based on phase-lock loop (PLL) systems is presented, such as: nonlinear control, frequency discrimination, frequency sweeping, bandwidth widening, program processing. The results of a study of the operation in the process of initial synchronization for two high-speed synchronization structures - a globally linearized synchronization system (GLSS) and a PLL system with a phase-frequency detector and a charge pump circuit (CPPLL) - are presented. In the course of simulation modeling, the advantage of GLSS in speed compared to CPPLL is shown, which can reach 10 times or more at frequency detunings that significantly exceed the system loop gain.