Implementation of an SoC architecture with built-in safety features

The multiprocessing is the most important property of all complex digital systems. To ensure the computing power of data processing systems, designers have solved this problem by multiplying the resources and by using different types of high-performance task-specific processing units together. Systems built on such a heterogeneous architecture called heterogeneous multiprocessor systems (HMS). The component processors of such systems may be not only general purpose CPU cores, but can be also DSPs, GPUs or any custom designed IP blocks. During developing a HMS, the designer may apply various high level logic synthesis (HLS) algorithms and tools for determining the proper processing units for fulfilling all the requirements. In this way, the cost and performance of the system to be designed can be improved significantly. The main aim of this paper is to introduce a unique microarchitecture for safety critical applications, which could be implemented efficiently in many variations by different HLS tools.