On the Performance of Link Space Communications using NB-LDPC Codes on Embedded Parallel Systems

This paper introduces a novel concept for exploiting low-power edge graphics processing units (GPUs) for decoding higher-order non-binary low-density parity-check (LDPC) codes within a good performance level. In the proposed remote system, we exploit the asynchronous and simultaneous use of CPU and GPU resources, time-encoded data streams, and the concept of multi-codeword decoding. We report a coding gain superior to 1dB compared to the binary counterpart for the optimal sum-product algorithm (SPA). We compare our proposed solution against dedicated application-specific integrated-circuit (ASIC) designs, showing that, although behind, the edge GPU is competitive in terms of performance and energy, while supporting a significantly reduced development effort. Moreover, the experiments confirm that the proposed edge architecture provides a promising framework for Galois fields of order up to 256 and also from short to moderate code length equivalent to the binary (128, 64) and (512, 256) codes, supporting efficient and low-latency remote processing, reaching 2 Mbit/s, in conformity with the CCSDS-231 standard, under a global 7W power budget.