Design And Throughput Analysis Of 4 Bit Asynchronous Pipelined Multiplier Using Null Convention Logic

An asynchronous design also called as self-timed circuit, is a sequential circuit without any global timing reference. The data exchange between functional blocks is achieved with distinguishing activity completion, using handshake mechanism. In synchronous circuits, the operations of various functional blocks are synchronized by oscillating clock. All functional blocks will react just at either the rising or the falling edge of the clock. Synchronous logic design techniques are adopted widely due to availability of various EDA tools for all design stages and vast expertise in synchronous circuit implementations. However, this increased parameter variations with current synchronous design techniques, will make it incompatible for future CMOS VLSI Technology. Reliability and performance of design will be compromised with increased timing variations. Nonetheless, asynchronous circuit design technique promises to provide comparable speed, power efficiency, low EMI, with module-based designs in complex systems (SoCs).