Intelligent traffic light controller – An FPGA implementation

With the increase in number of vehicles on roads, management of traffic flow on urban roads has become a challenging task. Bad traffic management increases the time spent on road, increases fuel consumption, increases greenhouse gas emissions, and also causes traffic congestion which can sometimes lead to a gridlock scenario. With rising crude oil prices, the problem of climate change, and taking into consideration the effects of global warming, efficient traffic management has become an imperative task now more than ever. So, in this paper, we will discuss the implementation of a traffic controller that can be deployed in traffic junction found near 280N between S 10
^th
street & S 11
^th
street in San Jose, California. The project aims to effectively clear the traffic between two signals near the entry and exit point of the ramp which are separated only by few meters. In addition to managing traffic, the design should also be able to handle pedestrian input to cross road. The design is later synthesized on a Spartan 6 series FPGA (Field Programmable Gate Array) using Xilinx ISE tool.