Visualizing Electromagnetic Fault Injection With Timing Sensors

This work presents a novel sensing and visualization technique that reveals spatiotemporal behavior on an on-chip power distribution network (PDN) during electromagnetic fault injection (EMFI) attempts. EMFI uses precisely timed electromagnetic (EM) pulses to manipulate the behavior of digital hardware and even bypass security features. The electrical phenomenon behind EMFI is not well understood due to the difficulty to instrument and observe the PDN during testing. We present a methodology for observing the analog effects of EMFI attempts with high temporal and spatial resolution. We use a grid of time-to-digital converters (TDCs) implemented within the fabric of a field programmable gate array (FPGA) to infer internal spatial voltages on the PDN. This technique provides new visibility into the effects of EMFI attempts. We also show the relationship between our sensor observations and observed logic faults. The insight gained from these techniques may inform ideal placement of critical security circuits and EMFI countermeasure design.