High-Resolution Single Event Transient Measurement Circuit with Low Area Cost

This paper presents a design of an on-chip single-event transient pulse width measurement optimized circuit. It enables the measurement circuit to achieve sub-FO1-inverter-delay and has a lower area consumption compared with the existing technology. The proposed circuit has been implemented by TSMC 28 nm bulk CMOS technology. A simulated SET signal is injected with a range of 5ps to 100ps and an interval of 5ps to verify the superiority of the circuit by SPECTER. The circuit-level design and simulation demonstrate that the proposed circuit could attain a time resolution of 5ps/one stage with low area cost.