A Simple Technique to Estimate Surface Traps from DC Transfer Characteristics of GaN-Based HEMT

This paper proposes a simple technique to estimate the surface traps in GaN-based HEMTs by applying a negative gate bias stress. The transfer characteristics of HEMTs were measured for drain voltages (V
DS
) varying from 2V to 10V in steps of 2V with gate bias stress of −8V. The stress time of the measurement was varied from Os to 300s in steps of 60s. For a particular V
DS
, as the stress time was increased, the off-state drain leakage current changed due to surface traps. Two different samples were characterized. In one sample with a significant amount of surface traps, the off-state drain leakage current de-creased with the stress time. In another sample with a negligible amount of surface traps, the off-state drain leakage current remained nearly constant. This simple measurement technique can identify surface traps present in GaN-based HEMTs. The results were corroborated through estimation of surface traps with special test structures.