Challenges in Low Power VLSI Design: A Review

The need for decreasing the standby power in battery aided devices is the main design objective for very large-scale integration (VLSI) engineers. Many leakage controlling techniques have been designed so far each with its pros and cons. The focus of this paper is on the comparative study of the current best domino logic methods using FinFETs. The unity noise gain for SCDNDTDL is 3.77X higher than the SG FinFET logic. This paper will help the researchers to get a technical hunch of choosing a technique over another.