Design and Comparative Valuation of an MSML Based Low Power Content Addressable Memory Cell

A Content Addressable Memory (CAM) is an associative memory used for fast lookup in various applications. In CAM design, Match lines (MLs) and Search lines (SLs) are the foremost reason for dissipation of power. A novel CAM word architecture with Master-Slave MLs is introduced in this paper to reduce the power consumption. This cell utilizes with charge refill minimization technique for reducing match lines (MLs) power dissipation. In the conventional CAM architecture, the searching operation is performed by only one match line, but in MSML architecture, there are one master match line (MML) and several slave match lines (SMLs). The proposed CAM cell is simulated, and performance matrices are compared with other conventional CAM architectures at advanced technology nodes. The simulation results demonstrate that the projected 4T CAM cell advances the MSML search performance by 30% and reduces the power consumption by 17% with 8% areas overhead due to the insertion of the inverter in the case of 128-bit CAM word. For 64×64 bit CAM array, our proposed architecture speeding up the search operation by 25% while reducing the power consumption by 15 times compared with the conventional MSML design.