Mechanical Robustness Study of Ultra Low Profile 3D Silicon Capacitors

Very recently, we are witnessing a real trend towards thinner and robust electronic devices. This is mainly true when considering applications such as Mobile and High Performance Computing (HPC). Indeed, for such devices, lower package height is needed, through different interconnection types (FOWLP/PLP) and by reducing bump height. This has a direct incidence on the thickness of the silicon components used within the packaging substrate. Thus, low profile (< 50 μ m) becomes necessary for passive components such as decoupling capacitors and raises the question of the trade-off between the thickness and strength of such components. Silicon capacitors are known to be very efficient from electrical point of view and this paper will cover the interesting mechanical feature of such components.