An Efficient Thermal Removal Solution for the Monolithic 2-D/2.5-D/3-D ICs

Power in watts of the chip, per unit area is growing exponentially. Continuous efforts are made to remove the thermal problems. Using the proposed methodology, connecting Thermal Collection Networks (TCNs) to Thermal Through Silicon Via (TTSVs) will pump up the thermal energy to the heat-sink-fan assembly. The Finite Element Method (FEM) tool analysis results reported that 31.62% of heat suction was observed in TCNs of monolithic Integrated Circuits (ICs), 11.36% in TCNs of Three-Dimensional Integrated Circuits (3-D ICs), and 35.34% in the junction temperature of the TTSVs when compared to approaches without this methodology. This methodology might lead to a new approach for designing electronic chips and 3-D IC structures.