Application of EBIC and EBAC for Nanoscale Fault Isolation of FEOL Defect

The advancement of semiconductor integrated circuit technology demands for nanoscale fault localization techniques to pinpoint the defect location. This is especially critical for subtle front-end of line defects which are easily destroyed from conventional top-down physical delayering or cross-section FIB and would require precise TEM to visualize the defects. In this paper, 3 case studies of nanoscale fault isolation were demonstrated using EBAC/EBIC method to localize the weak point of an ESD implanted clamp transistor design, to isolate the defect that resulted in erase failure in an embedded NVM device and to pinpoint the defect that caused high dark current in PIN SiGe photodiode.