A Maximum Eye Tracking Clock-and-Data Recovery Scheme with Golden Section Search(GSS) Algorithm in 28-nm CMOS

This paper presents a 2x-oversampling clock-and-data recovery (CDR) scheme with a golden section search (GSS) algorithm [1] of a 32 Gb/s non-return-to-zero (NRZ) receiver. The proposed CDR with GSS adaptively selects the optimum sampling phase of data clock as well as recovering edge clock. It operates fast without requiring slow procedures such as the BER measurement. To control sampling phases of edge clock and data clock, two parallel phase interpolators (PI) are used. After 2x-oversampling CDR locks, phase difference between edge and data clock is adaptively adjusted by the GSS algorithm. Assuming an eye height is a convex function in a 1 unit-interval, the GSS adaptation offers faster convergence than other search adaptation algorithms.