Trace Abstraction: A Novel Method to Enhance Fault Detection in Semiconductor Manufacturing Processes with An Optimization Approach

In today’s semiconductor manufacturing industry, fault detection (FD) and classification (FDC) techniques are usually leveraged for equipment health monitoring (EHM) and advanced process control (APC). However, as semiconductor manufacturing processes become more and more intricate, it brings higher requirements on FDC model’s effectiveness, efficiency, and explainability. As feature extraction and selection is a critical step in FD development, some pilot investigations on how to marry knowledge from subject matter expert (SME) with feature generation, such as segmentation-based feature extraction, have been performed. The current approaches, while effective in some cases, have some inherent shortcomings, such as high computational cost, SME’s participation, low possibility of process automation, etc., which hindered their generalization ability in a wider field. This study proposes a novel FD method with automated feature extraction by integrating trace abstraction and time series alignment. Trace abstraction is proposed to find a small subset of representative items from trace signals based on the golden wafer run, which removes the unnecessary information while keeping the representative points to depict the whole trace. The informative features are extracted after trace abstraction. Then Dynamic Time Warping (DTW) is adopted to apply the template to other wafer runs by aligning their time stamps. Furthermore, the representative points from the trace signals can directly be used for feature selection and FD modeling. In this study, the superiority of the proposed method is validated based on a dataset from a real-world etching production line.