On-Glass Thin Film Transistor Based on p-i-n Amorphous Silicon Junction

In this work we present a Junction Field Effect Transistor (JFET) for analog application based on hydrogenated amorphous silicon. The device is a metal gate/p-doped/intrinsic/n-doped/drain-source metal contacts stacked structure deposited on glass substrate. With respect to the metal/oxide/semiconductor thin film transistor, the reported device does not need the presence of the insulation layer simplifying therefore the fabrication process. Careful attention has been paid to the thickness and doping of the different amorphous silicon layers in order to achieve ease modulation of the n-doped channel and low threshold voltage. Threshold voltages around −2.5 Volt and transconductance values in the order of 10
⁻⁷
A/V have been achieved.