Modeling of Solid-state Circuit Breaker During Current Interruption Phase

As the enabler of next generation DC power distribution system, solid-state circuit breaker (SSCB) behavior is sensitive to power semiconductors, gate drive, energy absorber (e.g. varistor), and their coupling. Thus, it is critical to understanding the impact of different design parameters on the performance of SSCB, especially on the fault current interruption. This paper proposes an analytical model to establish the relationship between SSCB dynamic performance when the fault is being cleared dependence on design variables and operating conditions. Then the sensitivity analysis is performed based on the proposed model to identify the most critical design parameters. Finally, simulation and test results based on a 2kV/1kA SSCB prototype demonstrate the accuracy of the proposed model, which provides fundamentals for the design optimization of SSCB considering gate drive and energy absorber.