I. Introduction
In arithmetic operations, addition and multiplication are the basic and that is extensively used in processing applications [1]. Other blocks like subtraction (complement addition), division (successive subtraction), etc. are relay on addition. Hence adder only determines the entire performance of the system. There are a plethora of adder families(architectures) with varying power consumption, delay, and area usage. Few of the examples for them are Carry Skip Adder (CSA), Ripple Carry Adder (RCA), Carry Select Adder (CSeA), Carry Save Adder (CSaA), and Carry Look ahead Adder (CLA) which can be used based on their properties to improve the system performance. Meanwhile, enhancing the 1 bit full adder in the root level will consequently result in the routine augmentation of the entire structure. The performance of the full adder also greatly depends on the style that is adopted. The factors like transistor logic, transistor count etc. The 1-bit adder is a deciding factor in the operation speed of a circuit and it can be found indirectly with the help of delay time calculation. Similarly, the transistor's switching activity and its count can help to determine the circuit's speed of operation.