Innovational Methods in Comparators Design

This paper presents recent comparator works published between 2016 and 2020, including their innovative technologies, specific functions implemented after improvement, and analysis of their circuit topology. For instance, the FVF CMOS comparator demonstrated by Jesus Ezequiel is one of them, which utilizes the flipped voltage follower at the input stage to reduce the input resistance and work in a low-voltage condition. There is a three-latch feedforward comparator that uses a completely different way to upgrade the former circuit. The rest all belongs to the technical improvement based on the previous topology.