The methods for High-Speed Low-Power Dynamic ADC Comparators design

Contemporarily, Analog-to-digital converter (ADC) is widely used in our daily life, e.g. and the function of ADC is to convert input analog signals into output digital signals. With the development of integrated circuits, the demand for high performance comparators has been increased. High performance stands for lower delay, less power consumption and fewer offset and kickback noise. This review is based on the progress of optimized solution in the comparator and a series of optimization schemes. Specifically, this perspective compares conventional single tail structure, conventional double tail structure with a series of derivative optimization solutions which focus on power consumption and delay. Based on our analysis by information retrieve, the performances of comparators are optimized by performing better process technology increasing positive feedback. However, reducing kickback noise and offset without reducing reliability and performance is still challenging in the future. These results shed light the kickback noise and offset issues require urther optimization.