Mitigation of Cell-to-Cell Interference in Multi-Level-Cell (MLC) NAND Flash Memory Using Correction Factors

With the size of NAND flash-memory chips scaling down, cell-to-cell interference (CCI), stemming from the effect of parasitic coupling capacitance, has become the primary source of errors in reducing the reliability of flash memory. In this work, we present two CCI-mitigating algorithms to eliminate the CCI-induced errors for multi-level-cell (MLC) flash memory. Specifically, we attempt to introduce the so-called CCI-correcting factors to adjust the inaccurately estimated CCI strength of conventional postcompensation detection schemes while avoiding high computational complexity. To acquire these CCI-correcting factors, two CCI-mitigating algorithms, called vertical-and-diagonal-direction correction (VDDC) algorithm and all-direction correction (ADC) algorithm, are presented. Analytical and simulation results demonstrate that the proposed VDDC and ADC schemes can effectively eliminate the CCI-induced errors with low computational complexity compared to the state-of-the-art detection algorithms.