Process Optimization for CCGA Surface Mount Assembly Based on Physics of Failure

There is still limited second-level interconnect reliability for large-size ceramic column grid array (CCGA) devices. In this paper, the process optimization technology based on physics of failure (PoF) was proposed and applied in the CCGA surface mount assembly, considering the structure characteristics of the package and coupled process environment. This methodology is problem-oriented, focusing on the internal physical and chemical process related to the failure of components and materials. The failure mechanism study is conducted for typical failure modes, by which the sensitive process parameters about failure can be obtained. Then the corresponding process optimization tests are conducted, ensuring the board-level products meet the electronic interconnect requirements in service. The results showed that the process optimization methodology based on PoF was a useful and efficient tool for solving the interconnect defects of CCGA surface mount assembly.