Research on Effect of Annealing on Copper Deposited by Electroplating in High Density TSV

Through silicon via (TSV) has proved to be a vital interconnection component in three dimensional circuit intergration and advanced packaging, for it has incomparable superiorities in device miniaturization, high density and multifunction. However, in TSV structure, the stress of thermal mismatch between silicon and electroplating deposition(ECD) copper and the accumulated residual stress in process make thermal-mechanical reliability become a main factor affecting the development of TSV technology, which may perhaps result in serious reliability problems once an appropriate destressing treatment is not taken. In order to improve the reliability of TSV, annealing is used to facilitate the recrystallization of ECD copper and reduce structure stress. In this article, a large size TSV in which the diameter is 30µm and the depth is 200µm with a high density of 0.59% was fabricated and then filled with ECD copper. After a pre-CMP process, annealing experiments at different conditions were designed to get a less residual stress structure. TSV pumping was measured by Step Profiler. Scanning Electronic Microscopy (SEM) and Electron Backscattered Diffraction (EBSD) were used to characterize ECD copper after annealing. Effect of annealing on ECD copper was studied and appropriate annealing parameters were acquired according to the measured results above.