Modeling the Optimization Process of 2-Dimensional Models of 3-Dimensional Microelectronic Objects

The article discusses the problem of optimizing the characteristics of microelectronic objects in the transition from abstract virtual layout models of cells to their layout drawings in real design rules. Optimization of the characteristics of microelectronic objects is provided by an original layout compaction algorithm based on a virtual coordinate grid, which simulates the actions of a layout designer to reduce parasitic parameters.