Upgraded Circuit Simulation and Test Circuit Design for Transient Overvoltages in MMC HVDC Links

Overvoltages caused by pole to ground faults in High Voltage Direct Current (HVDC) links using Modular Multilevel Converters (MMC) deviate vastly from currently standardized transient test voltages. Previous investigations successfully imitated these transient stresses for a positive polarity, using single stage impulse circuits, and found the spark gap to be crucial for the performance of the circuit as well as for the simulation. Depending on various factors, the overvoltage can also be of negative polarity, which is not currently supported by the simulation model. Consequently, the currently used spark gap model is upgraded to appropriately represent the behavior for transient stresses with negative polarity and is empirically verified in this paper. Furthermore, a circuit design for the laboratory test setup has not yet been presented for arbitrary polarity combinations of DC and transient stress. Therefore, an existing laboratory test setup is adjusted. Measurements are carried out and the results are used to verify a simulation model of the test setup that is upgraded using the spark gap model.