Analysis of Reliability Operation of H-Bridge Cascade Multilevel Inverter

At this stage, the H-bridge cascaded multilevel inverter has complicated power supplies for the control system and trigger system, and generally can only meet the problems of running the device in the n-1 state. In this paper, a H-bridge cascaded multilevel inverter is designed. The main feature is that the STM32 and the main control system are placed on a unified potential, and the triggering part and the power supply potential of the power device are separated, which solves many problems. The important problem that level power supply requires multiple potentials meets the reliability of STM32 power supply. This article introduces the basic topological structure of the H-bridge cascaded multi-level inverter based on STM32 and the realization principle of the control system. A simulation model of a 12H bridge cascaded multi-level inverter was built in the EMTP power system electromagnetic transient analysis simulation software, and it was verified that the device can operate stably under the 12H bridge n-1 and n-2 models. At the same time, this paper designs an experimental device of a 12H bridge cascaded multilevel inverter from the hardware to verify the feasibility of the content of this paper.