Fully-Configurable FPGA-Based Instrument for Multi-Channel and Multi-Histogram Time Measurements at High-Performance

In this contribution we present a substantial breakthrough in the features of an existing prototype of a digital configurable Time-to-Digital Converter (TDC) for time measurements. Introduced innovation deals with hardware, firmware and software components of the architecture, enhancing performance in terms of speed (up to 200Msps per channel), modularity and migrability of the processing core among different host devices. This has led to a new, engineered, instrument for highperformance acquisition and measure of occurrence of time events (250 fs of resolution and single-shot precision lower than 12 ps r.m.s). TDC performs timing measurements collecting the timestamp between the 16 channels and the sync, with the possibility to compute up to 16 real-time histograms of the timestamps between any couple of channels and sync at the maximum channel rate, reaching some Gsamples/s of total throughput. The TDC is IP-Core structured, made compatible with Xilinx Field Programmable Gate Arrays (FPGAs) and Systems on Chips (SoCs) of last generation (28-nm Serie-7, 20-nm UltraScale, and 18-nm UltraScale +). The IP-Core firmware composition is flexible with respect to a standard Hardware Description Language (HDL) code and leaves space to the user for inserting custom modules, allowing the adaptation of the instrument to custom purposes, without threatening the performance of the TDC. Moreover, the most important feature of the firmware being IP-Core structured is the possibility to host it on different FPGA/SoC modules, guaranteeing not only firmware and software, but also hardware re-configurability of the instrument.