Abstract:
Approximate computing has shown to be an effective approach to generate smaller and more power-efficient circuits by trading the accuracy of the circuit vs. area/power. S...Show MoreMetadata
Abstract:
Approximate computing has shown to be an effective approach to generate smaller and more power-efficient circuits by trading the accuracy of the circuit vs. area/power. So far, most work on approximate computing has focused on specific components within a system. This severely limits the approximation potential as most Integrated Circuits (ICs) are now complex heterogeneous systems. This paper investigates if lower-power designs can be found through mixing approximations across the different components in the SoC as opposed to only aggressively approximating a single component. The main hypothesis is that some approximations amplify across the system, while others tend to cancel each other out, thus, allowing to maximize the power savings while meeting the given maximum error threshold. In this work, we consider the Analog-to-Digital Converter (ADC), CPU, hardware accelerators, and interconnect between all these components. Moreover, to quickly measure the effect of different approximation mixes, we have developed a framework that allows generating complete SoCs at the behavioral level through a bus generator and a library of synthesizable bus interfaces. This enables the use of fast simulation models (transaction and cycle-accurate) to accurately measure the error at the system’s output while measuring the benefit in terms of area or energy reduction of different mixes of approximations. Experimental results show that taking into account the entire system as oppose to only individual components leads to an additional average energy savings of 14% to 17% for different maximum error thresholds and the best case up to 39%.
Date of Conference: 26-28 July 2021
Date Added to IEEE Xplore: 04 August 2021
ISBN Information: