Fixtures Design Considerations for Impedance Measurement

The parasitic impedance in a current commutation loop (CCL) is a major factor for the switching performance of power electronics especially the wide bandgap (WBG) devices, which usually generate high di/dt. The terminals of components in a CCL may not always be standard. The fixture adapter with clip lead may not be accurate enough for WBG application, while the commercial high bandwidth fixture adapters are not always available. Therefore, it is critical to design fixture adapter boards to make a better interface and mitigate measurement errors. In this work, detailed fixture design procedures are presented. These design methods were validated by comparing with the commercial fixture adapters. In addition, various considerations to further improve the measurement accuracy are discussed, summarized, and evaluated through tests. The dc-link capacitors and the busbar for a half-bridge module are regarded as the device under test, whose impedance is extracted using the proposed fixture design. Finally, the experimental results from the double pulse test verified the accuracy of the proposed fixture design, with an error of less than 1%.