Analysis and Implementation of Current Controller with Reduced Delay for LCL-based Inverters

LCL filters are widely used in power electronic inverters, however the analysis of these systems is complicated by delays associated with digital implementation of their controllers. This paper proposes a new method to eliminate delays resulting from applying pulse width modulation (PWM) at inverters output. PWM delay is eliminated by shifting the middle point of applied pulses using some features of available digital signal processors (DSPs). The paper also limits the computation delay of various controllers to the time needed for two floating point multiplications, three additions and signals sampling. The impact of minimizing introduced delay in control loops is found to support reducing filter components sizes, securing robustness against parameters variations and supporting smooth transient responses. Through a number of simulation and experimental studies, the proposed method to minimize delay and the controller designed whereby are found to be very effective during steady state as well as transient response of inverters operation.