Interfacial Trap Effect on the DC and RF Characteristics of SiGe Heterojunction Bipolar Transistor

In this paper, the effects of interfacial traps on the AC and RF characteristics of SiGe heterojunction bipolar transistor have been investigated. TCAD simulations were carried out by defining and varying traps near the emitter base spacer oxide which can replicate the effects of hot carriers under various stress conditions. Reduction in DC current gain is observed with increase in traps whereas AC current gain degradation is occurred only at low frequencies. It is found that the cut off frequency fT is insignificantly affected by traps. However, degradation in maximum oscillation frequency, fmax with trap density variations is significantly high. The S parameter simulations carried out for different trap densities shows significant variations in S11 and S21 parameters.

I. Introduction

SiGe Heterojunction Bipolar Transistors (HBTs) are commonly used in analog, RF and mixed signal applications inorder to design circuits with low power, high speed and low noise. In order to improve the static and dynamic performances of the device, vertical and lateral scaling has been done. This leads to the devices being operated nearer or beyond the safe operating area (SOA), which indicates the maximum voltage as well as current levels for the stable and reliable operation of the device [1]. When the HBT operates nearer or beyond the SOA, several reliability issues especially hot carrier degradation will occur which severely affect the lifetime of the device [2].