High-precision channel synchronization design of PXIe digital integrated circuit test system

Portability and low cost make the PXIe system the best choice to reduce the cost of integrated circuit(IC) testing. However, due to the limitation of the PXIe module volume, the number of channels in a single module cannot be enough. And the testing of an IC with more pins will require multiple modules to achieve. In general, the synchronization performance between channels will be one of the most important indicators which affect the test capability of an IC test system. In this paper, a method which based on calibration to achieve synchronization between test channels in the IC test system is proposed. Through testing, toe time delay between board-level channels is <±100ps, the time delay of channels between modules of a PXIe system is <±1ns, and the time delay of channels between PXIe systems is <±2ns.