Suppressing the Effects of DC Voltage Fluctuation in PWM Inverters by Using Virtual Impedance

PWM inverters may be supplied by non-ideal DC voltage, such as the output of a single-phase rectifier, or the output of a three-phase rectifier with unbalanced supply. Such voltage fluctuates at a low frequency, which in turn distorts the output current of the inverter by low-order harmonics. Reducing the low-order harmonics on the output current can be done by using an output filter inductor. However, because the frequency is very low, the required inductor has to be very large. This paper proposes a virtual impedance concept to suppress the effect of DC voltage fluctuation on the output current. Because it is virtual, it does not give physical drawbacks such as size, losses, and cost, and can be designed only to affect the disturbance signals. Moreover, it can be designed to have characteristics that cannot be realized with a real impedance, and may be added as a plug-in block into an existing controller. Experiment results are provided to show the effectiveness of the proposed method.