Testing Embedded Toggle Pattern Generation Through On-Chip IR Drop Monitoring

On-chip monitor (OCM) circuits capture dynamic power-supply (PS) waveforms within power domains individually bounded by dedicated micro voltage regulator modules (μVRMs). This paper uses OCM to diagnose VLSI circuits with a modular power management, where the evolution over time of the gate switching count, in the clock tree, the flip-flops, and the combinational logics are precisely captured in the OCM voltage waveforms. A mismatch between simulation and measurement gives us a warning for either (1) faulty behavior in the IC hardware, or (2) bugs in the test program. In this paper, we demonstrate an IR-drop-based toggle diagnosis technique using OCM for a prototype chip in 180 nm technology. The OCM measurements at 100 ps and 100 μV are capable of reaching a resolution of 18.7 fC/gate. This is approximately equivalent to the amount of charge consumed by a single two-input NAND gate.

I. Introduction

The traditional test generation approach in which the fully integrated circuit (IC) chip is treated as one unit for automatic test pattern generator (ATPG) has become intractable. With the increase in scale of IC chips, most system-on-a-chip (SoC) and three-dimensional stacked ICs (3DIC) are tested with modular test approaches [1].