A 0.03-3GHz Wideband Inductorless Receiver in 65nm CMOS

An inductorless wideband receiver supporting multiple wireless communication standards from 0.03GHz to 3GHz is presented in this paper. It adopts Low-Intermediate Frequency (IF) architecture. A two-stage inductorless wideband low noise amplifier (LNA), with Capacitor Cross Coupling (CCC) technique at the common gate stage and Multiple Gated Transistors (MGTR) technique at both common gate and common source stages, is proposed in Radio Frequency (RF) front end. Impedance translation structure is introduced for suppressing the blocking signal. A three-stage sub Biquads low-pass filter (LPF) is designed to enhance the stopband rejection performance. Single miller feed-forward compensation is introduced in its transimpedance amplifier (TIA) design as well for the sake of power saving. This wideband receiver is fabricated in standard 65nm RFCMOS process, occupying 3.9mm
²
. The whole receiving chain achieves a maximum link gain of 104.53dB and a minimum single sideband noise figure (SSB NF) of 6.809dB in simulation. When the receiver is in 3GHz frequency band and the bandwidth of LPF is about 20MHz, the in-band and out-of-band input third-order intercept point are -27.186dBm/-20.8761dBm, respectively. The core circuit consumes 99-104mW under 1.2V/2.5V supply.