Voidless Chip-on-Wafer Process for Functional Interposer

A functional interposer using a Chip-on- Wafer (COW) bonding process with a Si capacitor chip was studied. In this study, the relationship between chip warpage and void formation was examined. By using a low-pressure and atmospheric-pressure curing process continuously at a temperature that minimized chip warpage, voidless bonding with a 5 μm-thick adhesive layer was achieved, even though the Si capacitor chip originally had a large warpage of about 6 μm. We found that chip warpage mitigation and the pressure conditions during curing of the adhesives affected the formation of voids.