Hybrid gate dielectric with Si3N4 stressor for LDMOSFET

Lateral double diffused MOSFET (LDMOSFET) with Stress engineering has been explored in this work with a calibrated Silicon (Si) simulation deck. Silicon Nitride (Si
3
N
4
) layer having intrinsic stress has been used to generate stress in the device. Hybrid gate dielectric with Silicon dioxide (SiO
2
) and the Si
3
N
4
is used in this study. With the help of simulations (Process, Device and Mixed-mode), we observe the drain current improvement of 6%, decrease in terminal capacitance and specific on-resistance (R
on,sp
) and increase in the transition frequency. This method can supplement the existing performance improvement techniques for an LDMOSFET device.