Hot-Carrier-Induced Reliability Concerns for Lateral DMOS Transistors with Split-STI Structures

In this work, four LDMOS devices with different split-STI structures (Device A: LDMOS with traditional split-STI, Device B: LDMOS with slope-STI, Device C with step-STI and Device D with H-shape-STI) have been fabricated and investigated. Because they own consistent breakdown voltage (BV
_off
), the hot-carrier stresses including the maximum substrate current (I
_submax
) stress and the maximum gate voltage (V
_gmax
) stress are carried out successfully. It is found that they exhibit different hot-carrier reliabilities due to the different STI structures. With the assistance of the T-CAD simulation tools, the inner mechanisms of these phenomena are discovered in detail.