Simulation of fast room-temperature bonding by mechanical interlock structure applied for 3D integration

A mechanical interlock Cu-Sn bonding for multi-chip 3D integration is proposed to save total bonding time and lower bonding temperature. Protrusion Cu width, recess width were optimized based on strain and stress simulation. Bonding pressure, annealing temperature, and shear stress after mechanical interconnection were studied for the process condition. Then optimal design was proposed finally.