An Automation Methodology for Amelioration of SpyGlassCDC Abstract View Generation Process

The integration of numerous IPs with increasing RTL complexity over the system on chip (SoC) has become a difficult task. In the SoC, multiple IPs are working on different clocks, graving challenges like metastability, data loss etc. may arise in the regime of asynchronous clocks. These issues must be tackled carefully early in the design-cycle as it impacts the technical feasibility of the SoC. An unresolved clock domain crossing (CDC) issue can result in design failure forcing an expensive design re-spin, this extends time to market by months, greatly reducing chips market share and profit potential. SpyGlassCDC is one such tool that provides a rich suit of rule set to verify different kinds of CDC issues. The hierarchical verification flow of SpyGlassCDC allows us to use the abstract views for block level that can be used to perform SoC level CDC verification. However, there is a gap between state-of-art techniques and the requirements of modern designs, as the methodology involves repetitive human efforts and is susceptible to manual errors that make it difficult to meet the stringent timeline. Therefore, this paper presents an automation methodology for the generation of abstract views. The proposed methodology has eliminated the repetitive human efforts and manual errors involved in the existing methods. Results show that the proposed methodology reduced the SpyGlassCDC validation time by significant amount (about 84%). Also features like selective regression, log file generation makes it more efficient than existing methodologies.